Extending Your Verification Capabilities Beyond Design Rule Checking with Altair PollEx

Ju4n_R0sales
Ju4n_R0sales
Altair Employee
edited May 2023 in Altair HyperWorks

There tends to be significant hesitancy toward verification tools, mostly when comparing them to a design software’s design rule checking (DRC). DRC is a set of rules that prevent errors in design and are applied live when a user is designing a printed circuit board (PCB). For PCB designers and manufacturers in the electronic system design space, understanding the benefits of Altair® PollEx™ in addition to the toolsets they may already have in hand is crucial in developing an integrated design and verification process that meets all design needs. While the two tools are often compared as equal, we will explain why PollEx verification is considered a valuable asset to the standard DRC ruleset, using Altium’s DRC and PollEx PCB verification tools as an example.

Altium Designer offers a set of more than 50 design rules covering different areas of electrical, manufacturing, and assembly verification. These rules are general for PCB design and can be applied both live and in batch mode. Most of these are basic clearance checks and very few can be categorized as design conventions.

The main difference between PollEx verification and Altium’s DRC is that the PollEx ruleset combines different geometrical checks with design conventions to detect issues that can translate into manufacturing, assembly, and electrical issues (about 200+ rules).

PollEx has seamless integration with Altium Designer and can be used in parallel to provide fast, easy verification checks to detect andand assess potential PCB design issues before they arise.  As seen in Figure 1, PollEx verification can ensure that there are no issues for both the schematic and layout/routing stages, even when only just a few interfaces and structures aren’t yet routed. Once the design has reached a mature state, it can move forward into the next stages such as computer-aided engineering (CAE) simulation, manufacturing, and testing.

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Figure 1. A design workflow that includes verification.

Let’s focus on some examples for the approach presented earlier to understand how PollEx verification compliments Altium’s DRC.

Tombstoning

is a common soldering defect that typically occurs with smaller surface mount packages where a chip passive (or in some cases active integrated circuit) component is lifted by the liquid solder during reflow. This phenomenon is mostly due to the thermal imbalance of both pads of the component and sometimes silk screen or copper objects that can impact a component’s placement.

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Figure 2. Tombstoning effect on a chip resistor

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Figure 3. Representation of tombstoning due to silk and copper objects between the two pads of the components

To correct these, checking is mostly visual in the design process, which doesn’t always yield the most accurate results. Here, the DRC software combined with PollEx can help by defining the ratio of the trace width to the pad, resulting in a more stable design with less errors.

PollEx’s design for manufacturing (DFM) capabilities can assess the causes of tombstoning by:

  • Searching for silkscreen and copper objects between pads that can affect the height of the placed componen
  • Detecting if multiple connections are routed to the same pad directly, and examining how vias are placed relative to the pad

Panel Verification

If you manufacture PCBs in-house, or the files you send to the contract manufacturer are panels, there are specifications that a panel is required to meet. With Altium Designer, you can create panels for your boards according to specifications before sending it to be manufactured. These panels can be checked with limited scope using the design rules, like checking for fiducial distance from the edge or the position of labels on the panel. 

PollEx allows designers to go further with panel verification before sending a board to be manufactured, and checks for the following:

  • Placement of fiducials
  • Array size
  • Guide hole placement 
  • Existence of labels 
  • pacing between objects and different areas of the panel

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Figure 4 Example of clearance checking on a board array.

Traditionally, these panels are verified manually – PollEx can automate these checks and streamline the process, thereby saving time and reducing costs.  

High-Speed Verification

Some signal integrity issues have their origin in the routing of the connections. It’s the task of the designer, and of the setup of the electrical computer-aided design (ECAD) tool, to route these traces. In addition to this, designers also have to maintain lengths matched, ensure adequate return paths, prevent coupling with other signal nets, and maintain proper shielding with vias and ground planes. 

Altium’s DRC has tools to define and route high-speed interfaces (length matching) and to ensure that there’s an adequate return path for a signal.

Here, PollEx can further enhance the verification process by:

  • Checking for ground vias that provide a return path to layer changing nets
  • Providing ground shielding for important traces
  • Checking for distance between signal nets that use buried vias and traces on adjacent layers

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Figure 5 Visual representation of layer changing nets

Electrostatic Discharge (ESD)

When the ESD current flows through the ground plane, noise can be coupled to signal nets close to high impedance areas. This would be on gaps or on the edge of the ground plane. PollEx can check for where these high impedance spots are located and check for nets around them within a certain distance (Figure 6).  

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Figure 6 Visual representation of the ESD noise coupling check.

Other ESD-related issues that PollEx can detect are the following:

  • Existence of suppression diodes with schematic verification
  • Check if sensitive nets are placed close to ESD sources like connectors

Conclusion

Verification tools and DRC can have an overlap in what they offer, but that doesn’t mean they can’t complement each other. The DRC is a built-in tool that can help designers detect major issues with PCB verification, and is designed to be quick so that it can be executed at any time. There’s a great deal of issues that are mainly assessed through experience and visual inspection – these can be automated using verification tools, reducing time and cost early in the process before errors are caught too late.


These types of tools can help designers exchange knowledge and design conventions that arise from experience, whether it’s during the simulation or testing of a product. They can also aid new designers to learn design conventions and ensure that their lack of experience doesn’t have an impact on the design cycle.


PollEx offers a wide variety of checks covering many of the most common design issues that will be explored more, with additional content covering this topic on the horizon. In the meantime, learn more about PollEx applications at https://www.altair.com/pollex-applications