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Altair Community January 2025 Roundup
Hi Everyone, I would like to start a roundup post every month to highlight the top activities of our community. Let's look at what happened in January 2025. 🏆 January's Leaderboard Huge shout out to our Top Monthly Leaders ! 🎉🎉🎉Thank you so much for participating and being part of our community! @QNGUYENDAI @Sebastian_981…
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Community Champion of the Month - January, 2025
The Community Team would like to introduce the January Champion of the Month, Philip Holland @Philip_Holland. For 44 years Philip R Holland has been working with the SAS language. In that time, he has witnessed the evolution of usage of the language from mainframes to modern analytics environments used across all business…
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Altair Community Power Conversion & Motor Drives Chat
Introducing Power Conversion & Motor Drives Chat Series Join us for an exciting technical series where we will showcase the new capabilities of Altair’s power electronics and power conversion design tools. This monthly series is designed to showcase the latest capabilities, applications, and workflows for the design…
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Welcome to the Altair Community! Get Started Here
Welcome to the new and improved Community! We are excited to welcome you to the new and improved Altair Community experience. By joining, you become a part of a thriving and engaged network of over 1.3 Million users to access resources, share ideas and solutions, and connect with fellow experts worldwide. Benefit from the…
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Altair Community Magnetics Chat
Join us for an exciting technical series where we will showcase the new capabilities of High Frequency and Low Frequency tools in Altair. This monthly series is designed to empower industry experts by providing them with insights into the latest features, workflows, and advancements in Altair’s Electromagnetics solutions.…
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EDEM Tutorial CAD Files
I am currently in the process of taking the EDEM 2024 introduction course. As I've progressed through, I've noticed some of the videos have CAD geometry and models already set up. Do files associated with the tutorials exist? Thank you!
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How to Fix Cannot Load Geometry
I arranged my datas and lastly I want to add solidpart format to click of "import geometry" but I took an error about that cannot load geometry. I drew a part in Solidworks but occured same error. I created an montage design by the parts and same error again. I tried in step folder format for all drawings but occured same…
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Help liking input variables in HyperStudy
I have a variable called M which can take any value from 1 to 6. I want the value of S to take the value of 50, 60, 63.333, 276.67, 300, 1802.3 when M takes the values 1, 2, 3, 4, 5, 6 respectively. I.e. S = 63.333 when M = 3. Please could someone advise how I should do this.
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Exporting Free Body loads for multiple load cases change the coordinate system
Hi, The HM2024 model I'm working with has fasteners in different orientations. The analysis systems for the nodes attached to these fasteners have been updated to align with geometry. When exporting the FBD loads tables for all 14 load cases the first load case recognizes the correct CSYS but the remainder cases the loads…
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Hypermesh - Bearing Load
Hi, I want to replicate some ANSYS model in HyperMesh. The model contains a hole where a bearing load is applied. In ANSYS software that load is easily applied with a dedicated command. However, I cannot replicate this in HyperMesh. Bearing loads are applied in the half-surface of a cylinder with a sinusoidal distribution…
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Port to MacOS
We have had customers request a port to MacOS. Please upvote this forum post if that would be something of interest to you.
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VPI support
Hi, The documentation mentions that DSim wants to support the VPI. I have been playing around with the VPI and tried DSim with cocotb. There seems to be issues regarding logging and get_sim_time callbacks: -.--ns TRACE gpi ../gpi/GpiCommon.cpp:616 in gpi_to_user Passing control to GPI user -.--ns TRACE gpi…
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Preprocessor output
Is there a way to inspect preprocessing output, such as text macro expansion, in DSim? IIRC, early versions of DSim shipped with a stand-alone SystemVerilog preprocessor, but there doesn't seem to be such a thing in recent releases.
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bug while parsing sdf file for annotation
Dsim fail with the attached example, as follows: dsim -top tb_test -sdf-verbose -timescale 1ns/1ps tb_test.sv =N:[UsageMeter (2025-02-04 15:00:09 +0100)] usage server initial connection =N:[License] Licensed for Metrics Design Automation. =N:[License] New lease granted. Analyzing... Elaborating... Top-level modules: $unit…
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Implicit port connection not properly checked
Consider the following simple Systemverilog code: module test (input logic clk, rst, output logic [3:0] cnt); always_ff @ (posedge clk) if (rst) cnt <= 0; else cnt <= cnt + 1; endmodule : test module tb_test; logic clk, rst; logic [3:0] cnt2; test mm (.*); // Error here initial begin rst = 1'b1; #3ns rst = 1'b0; #120ns;…
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Bug Report
I found the following bugs. 1. variables/objects declared below their reference point is not properly recognized in a class. Example) class my_class; //int a; // O.K function new(); a = 3; //this.a = 3; //O.K endfunction int a; // Compile Errorendclass The code above is complied normally if 'this' is not omitted. 2.…
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Bug: Applying a custom VHDL attribute to an array of records fails to compile
Compiling the following package fails in DSim version 20240422.0.0 with library ieee;use ieee.std_logic_1164.all;use ieee.numeric_std.all;package attribute_def_pkg is attribute type_length_attribute : natural; type record_type is record field_1 : std_logic; field_2 : std_logic; end record; attribute type_length_attribute…
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Mixed signal simulation dump file .mxd error
Hi, when working with a VHDL design with UVM environment so, doing mixed language simulation. I noticed that dumping the SystemVerilog BFM interfaces, VHDL DUT to .mxd file with the command : -waves <file_name>.mxd seems succesfull and end with no error. However, VHDL dump signals are only toggles between x and z when…
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Is there a method to save waveform signals and then reopen them in a new waveform window?
Hello everyone, I just wanted to know whether this feature is currently enabled or if it will be available in the future. It would be helpful to be able to save the signals and then reopen them in a new simulation. Thank you in advance. Ricardo
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View System Verilog unpacked arrays in waveforms
I have a System Verilog design which is using some unpacked arrays and I noticed I can't view them in metrics waveform. Is there any command-option to enable them? Or we do not have that feature? Thanks in advanceÂ
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Dcreport tool assertion fails
Hi, When I try to use dcreport.exe executable to generate coverage report from a .db file, An assertion fails inside dcreport.cpp file as given below : PS C:\Users\dguzel\Desktop\wb2spi_vip\sim> dcreport.exe -out_dir .\Coverage-results\ .\metrics.db Assertion failed: n_inputs == inputs.size(), file cov_db/dcreport.cpp,…
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Block coverage closing implicit case defaults
Hi, when i extract a block coverage i have realized that automatic case defaults are created and they are %0 coverage. Do I have any option to exclude code block from line coverage or close automatic implicit case default creation in line coverage report. Thanks
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Toggle coverage and Expression coverage does not included in coverage report
Hi, I am currently trying to take line, toggle and expression coverage from a verification IP. I have prepared cov_spec file and gave option -code-cov a for covering all. However, final db only consist line, functional and assertion coverage. I also wanted to see expression and toggle coverage. Can you describe me except…
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Code Coverage issues after merging .db and generating reports
Hello, I must first express my gratitude for the software and the support provided; it's been fantastic. I've been simulating an RTL design with an UVM testbench this lasts weeks, and I've recently activated code coverage. I followed the advice in this post to focus solely on the RTL: code coverage causes to crash :…
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code coverage causes to crash
Working dsim verification environment crashes when I gave the flag called "-code-cov a". Before giving that coverage flag it compiles and simulates perfectly. The crash comes from CGModule.cpp line 354. There is a assert statement that fails and crashes program with flag "=F:[Crash]". The verification environment includes…
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Mechanism to manually release license
Hi there, It would be very helpful to have a mechanism to manually force a license release from the command line. In doing VPI work, one finds oneself gleefully slinging around raw pointers across language boundaries with joyful abandon. It's pretty to easy to cause segfaults due to human error. Having to wait for the 5…
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DSim crashed on array access
Hi, I was playing with DSim on the Linux system (DSim version 20240422.6.0) and I found weird crash: dsim: sv/SVBitSpan.cpp:99: bool dsim::sv::GetSIAndSpanFromExpr(dsim::sv::SVStoreItemRef&, dsim::sv::SVBitSpan&, dsim::sv::SVExprRef, bool): Assertion `0 && "can't refine span"' failed. I've created small example that…
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Crash DSim
I'm trying to use your simulator and I got a crash error when compiling SV/VHDL mixed environment. This is the sample env to reproduce this bug. https://gist.github.com/taichi-ishitani/97927543fa14edd95a84bd7f9be04115 You will see the crash report below during elaboration process. =F:[Crash] This Metrics software product…
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Add the capability to store waveform signals in the waveform viewer
As discussed in Is there a method to save waveform signals and then reopen them in a new waveform window? : Support (metrics.ca) I suggest adding this feature to allow us to reopen a simulation and load stored waveforms, instead of manually searching for them every time.
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Waveform Reload Function
It would be nice if there is waveform reload function and a button for it on Waveform Viewer.Currently, we have to close Waveform Viewer and reopen updated *.mxd file on VS code once new simulation is run again and *.mxd file is updated. Shown signals should be kept even if the waveform file is reloaded.Â