What's New in PollEx 2021.1

JungSup Kim_22376
JungSup Kim_22376 New Altair Community Member
edited December 2021 in Altair HyperWorks

Let’s have a look at the key features of Altair PollEx 2021.1!

Adding and modifying new license features

  • New license feature code: PollExMFG is added for the PollEx manufacturing options which will draw the same 30 AUs.
  • Changed license feature code: PollEx UPE application is available in PollExBasic feature which will draw 10 AUs from 30AUs.
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Figure 1 – Altair Unit Chart for PollEx Products


Adding "Altair License Utility"

  • Now added in PollEx 2021.1 launcher.
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Figure 2 – Altair License Utility in Altair PollEx 2021.1 Launcher


Adding "Altair License Management System" setup panel

  • The environment variable setting panel is added during install. This panel is only displayed if the environment variable has not been set.
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Figure 3 – Altair License Management System in Altair PollEx 2021.1 Installer

 

Adding design data saving option in PollEx PCB

  • A new feature to save design data in a project directory with a compressed file (*.tgz) to share relevant data conveniently.
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Figure 4 – PollEx PCB, Save Project Data into Compressed File (*.tgz)


Added "SI Explorer"

  • A feature to support pre-layout analysis "SI Explorer" menu to validate the design decisions throughout the design process, including the selection of parts, add materials, construct board layer stack-up and create the net topology.
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Figure 5 – PollEx SI Explorer dialog
  • Upon executing PollEx SI Explorer, the SI Explorer dialog comes up. You can start pre-layout signal integrity analysis from the scratch.
    • Create layer stackup
    • Create VIA model
    • Create Transmission Line Model
    • Create Net topology (Single-ended, Differential, Multi-coupled)
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Figure 6 – Built-in Topology Model Libraries
  • Perform Signal Integrity Analysis (Waveform, Eye-diagram, Network Parameter)
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Figure 7 – Signal Integrity Analysis (Waveform)


Adding a feature to display S/Y/Z parameters

  • Adding a feature to display S / Y / Z parameter in Network Parameter viewer, PollEx SI. By using this function, it is possible to compare and measure by opening the S / Y / Z parameters extracted from various conditions.
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Figure 8 – Network Parameter Viewer


Adding an automation feature to support Multi-PCB structure

  • Added a feature to generate system-level net topology automatically. By using this function, multi-level topology configuration and analysis between PCBs with different stackup is possible.

Note: In version V2021.1, only single net (Single-ended, Differential Pair) analysis is possible. The analyze function of multiple net topologies will be released in V2021.2 version.

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Figure 9 – System Level Analysis Dialog


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Figure 10 – System Level Net Topology


Adding a feature to support Rigid/Flexible PCB design

  • System level signal integrity analysis is possible considering the multiple stackup structure designed as a Rigid/Flexible structure.
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Figure 11 – How to Add Rigid/Flexible Stackup Structure


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Figure 12 –Analyze Rigid/Flexible Structure


Adding a feature to extract SPICE Netlist

  • Adding a feature to extract SPICE Netlist, you can select and determine the results of network parameter analysis. You can specify the output of the network analysis. (S/Y/Z Parameter, Spice Netlist, PSPICE Netlist)
    • S/Y/Z Parameter: Network Analysis results are displayed as S/Y/Z parameters.
    • Spice Netlist: Network Analysis results are saved in Berkeley Spice compatible format. (*.sp)
    • PSPICE Netlist: Network Analysis results are saved in PSPICE compatible format. (*.lib)
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Figure 13 – Selecting Network Parameter Analysis Result


Adding a feature to assign analog input

  • Added a function to apply analog waveforms such as a sine wave as an analysis stimulus during network analysis.
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Figure 14 – Assigning a Sine Wave as a Stimulus for Network Analysis


View the full Release Notes and download PollEx 2021.1 from Altair One.

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