How to create a time variable delay with 3 signals

Ludowick MARIE-CLAIRE

I want to create a variable time delay block with a reference signal, a signal with the delay and a variable time delay.

 

Have an idea for make this ?

Rhonda_20369

You may user a C block and write the code.

The information about C block in PSIM can be found by clicking "Help >> Index", and then, searching for "C block".

There are example circuits, online help documents, and video tutorials.

Albert_Dunford

To add to Rhonda's comments, this is tricky if you are doing an analog waveform, if you are doing a logic level signal you can use a comparator with an integrator to track time. then use some other logic elements like flip flops and logic gates to implement your delay.