Boost PFC Converter - Control Loop Design


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Introduction

SmartCtrl is a general-purpose software specifically designed for power electronics applications. This tutorial is intended to guide you, step by step, to design the control loops of a PFC (power factor correction) boost converter with the SmartCtrl Software.

The example used in this tutorial is the PFC boost converter circuit that comes with the PSIM example set. The PSIM schematic is shown in Figure 1.

The circuit includes the inner current loop and the outer voltage loop. The current loop regulator parameters are the resistance R11, R2_i and the capacitances C2_i, C3_i; and the voltage regulator parameters are the resistance Rset and the capacitances Css and Ct, highlighted in the red boxes of Figure 1.

The objective of this tutorial is to design the current and voltage regulators using the SmartCtrl software. The design procedure is described below.

 

Open SmartCtrl

To begin the design process in SmartCtrl, click on the icon highlighted in top part of Figure 2 or click on the icon of tool bar shown in bottom part of Figure 2.

It can also be accessed with the Design menu, Predefined topologies ->AC/DC converters ->PFC Boost converter. Whatever the access selected, the window of Figure 3 will appear.

In Figure 3 the fields are grouped depending if they are for inner or outer control loop.

As shown in Figure 3, the PFC boost converter is controlled by a double loop control scheme. The inner loop is a current loop, and the outer loop is a voltage loop. Note that the PFC boost converter design must be carried out sequentially, first with the current loop, and then the voltage loop. SmartCtrl will guide you through this process.

Inner Loop Design

Before designing the inner loop, select the type of the multiplier.

1. Select the Multiplier UC3854A as shown in Figure 4

Attending to the schematic in Figure 1, the parameters of the multiplier for this particular example are the ones shown in Figure 5.

Notice that KFF, the feedforward gain, is the ratio between the rms input voltage and the average input voltage to the multiplier. It has been calculated applying [1].

Where RFF1, RFF2 and RFF3 are the resistances with the same name which can be observed in the schematic of Figure 1.

The configuration of the UC3854A multiplier can be found in Figure 5.

2. Select the gain of the inner loop current sensor

See Figure 6.

Select the value of the resistor which will act as the current sensor (Rs). This resistor is represented in the picture of the power plant.

3. At this point, the inner current loop is almost defined as can be seen in Figure 7

To finish this loop, it is necessary to define the plant topology. To do so, select a boost PFC (resistive load) plant.

Configure the plant and the inner loop compensator

1. Select the Boost PFC (Resistive load) plant for boost PFC converter

Complete the parameters in the input data window as shown in Figure 8. Note that the input voltage is in rms value.

Note that wta(º) is the line angle in degrees at which the plant operation point is calculated. The current loop is designed considering the plant calculated for this operating point. This line angle is indicated as a red dot in the output panel that represents the Rectified voltage and external compensator output.

When finished, click OK to continue.

2. Select a Type 2 as the current regulator as done in Figure 9 and configure it as it has been done in Figure 10

It is necessary to know the ramp waveform (Figure 10) in order to specify the parameters Vp (maximum voltage), Vv (minimum voltage) and tr (rise time). These parameters configure the converter modulator whose gain is important in the inner loop calculation.

3. Select the crossover frequency and the phase margin with the help of the Solution Map. See Figure 11 and Figure 12

SmartCtrl provides a guideline and an easy way of selecting the crossover frequency and the phase margin through the Solution Map. See Figure 12.

In the Solution Map, each point within the white area corresponds to a combination of the crossover frequency and the phase margin that leads to a stable solution. In addition, when a point is selected, the attenuation is given by the sensor and the regulator at the switching frequency provided.

To carry out the selection, click a point within the white area, or it can be done manually by entering the crossover frequency and the phase margin and clicking on Update.

In this design, it selects a crossover frequency of 1kHz and a phase margin of 50 degrees. This parameter pair will generate a -39dB of attenuation at the switching frequency.

Once the crossover frequency and the phase margin are selected, the Solution Map will be shown on the right side of the converter input window. If, at any time, the user wants to modify the crossover frequency or the phase margin, just click on the white area of the Solution Map, as shown in Figure 13.

Outer Loop Design

The process of designing the outer loop is similar to that of the inner loop.

1. Select the voltage sensor

In this particular example, the option chosen is “Regulator embedded voltage divider”. See Figure 14.

There is no need to define any other parameter in this sensor.

2. Select the voltage regulator

See Figure 15

In this example, the regulator type is a “Single pole_unatt”, with the parameters specified in Figure 16.

In this case, three different compensators can be used:

a) PI unattenuated – it has an infinite gain at DC so it will reach the steady-state value. However, it will introduce a small distortion in the current waveform that will reduce the Power Factor coefficient.

b) Type 2 unattenuated – it is similar to the unattenuated PI, and it has the almost same characteristics.

c) Single pole – it has a finite gain at DC so it will not reach the steady-state output voltage (it will be a few volts below the 400V reference); however, it will not distort the current waveform so it is used when unitary Power Factor coefficients are required.

3. Determine the crossover frequency and the phase margin

The crossover frequency and the phase margin of the outer loop must be selected. A Solution Map is also provided to help select a stable solution. Press the Solution Map (outer loop) button (Figure 17) and the Solution Map will appear (Figure 18).

Select a point by clicking within the white area, and click OK to continue. In this tutorial a cross frequency of 10Hz and a Phase Margin of 60 degrees have been selected.

Once the crossover frequency and the phase margin are selected, the Solution Map will appear on the right side of the converter input window. If, at any time, these two parameters need to be changed, just click in the white area of the Solution Map, as shown in Figure 19.

4. Accept the selected design by clicking on OK

SmartCtrl will automatically show a calculated control system. By means of Bode plots, Nyquist plot, etc. its stability and dynamic response can be checked.

 

Design results and interpretation

When the data input wizard finishes, some panels appear so the user can check the dynamic response of the control already designed and adjust it. This window configuration can be seen in Figure 21.

 

SmartCtrl provides several analysis options:

a) Check the steady-state waveforms – they are shown in the right part. They are useful to identify possible oscillations, noises, or waveform distortions.
For example, if PI compensator would have been chosen for the outer loop, a current distortion will appear in these traces. See Figure 21.

b) Check the response to a small signal step – It gives information about the response of the system, if it is underdamped or overdamped. See Figure 21.

c) Check the bandwidth with the Bode plots – The crossover frequency in open-loop is pretty close with the closed-loop bandwidth. See Figure 21.

d) Check the stability with the Nyquist plot – it provides quick-understanding info about the stability of the system. See Figure 21.

e) View the input and output reports. See Figure 20 and Figure 22.

f) Perform a parametric sweep. See Figure 20 and Figure 23.

g) Modify input data for inner loop, outer loop and plant. See Figure 20.

h) Visualize data from input or output loop. See Figure 20.

i) Export to PSIM. This functionality has been covered in point 5.

 

Note that the Solution Map window is always enabled so the user can always change the pair Phase Margin – crossover frequency.

The Bode plots and Nyquist plots corresponding to the inner loop are shown in Figure 21, as well as the graphical information regarding the outer loop is shown in Figure 24. In the right panel “Method”, three parameters appear:

By clicking with the right button on the line current panel, a floating menu appears, offering different choices. One of them is the command FFT, which displays a new window with a plot that shows the amplitude of the first and third harmonics of the line current, to provide more information regarding the harmonic distortion. See Figure 25.

The red dot in the rectified line voltage plot of Figure 26 originally corresponds to the line angle wta specified in the plant window (Figure 8). This dot can be moved by clicking and dragging, and the Bode plot and the attenuation parameters will refresh, as the plant is recalculated considering the equivalent DC/DC converter for that particular operating point. An example is depicted in Figure 27, modifying the line angle. Notice how the open-loop transfer function changes.

The blue dot in the rectified line voltage plot (Figure 26) is placed in the line angle that corresponds to the maximum current ripple through the inductor. Some results obtained by simulating the schematic in Figure 1 are depicted in Figure 28.

To illustrate the meaning of this blue dot. In the left part of Figure 28, the voltage at the output of the rectifier and the current through the inductor are shown, indicating the position of the blue dot.

In the right part of the figure, a detail of the same waveforms is shown, as well as the oscillator ramp and the internal compensator output.

The plot that shows the oscillator ramp and the inner compensator output is useful to determine whether there could be oscillations. If the slopes of both functions are too similar, there could be more than one intersection per period, causing oscillations.

When a single-pole is used as the compensator type of the outer loop, there are some advantages regarding the line current distortion. On the other hand, the actual output voltage may not be exactly as the specified due to the low gain at low frequency. This causes some differences between the SmartCtrl results and the simulated results. This problem can be easily compensated by the user by increasing the output voltage reference.

However, if the actual output voltage is 10% higher than the specified one, SmartCtrl will provide a warning message, recommending the user to check this point and increase low frequency gain. In this particular example, the actual output voltage is 415 V instead the specified 400 V, and consequently there is not any warning message.

To illustrate this problem related with the low gain of the outer loop at low frequency, a new outer loop has been design, with different phase margin (PM) and cross-over frequency (fc).

The comparison between this design and the original one can be found in Table 1. The new design has a lower gain at low frequency and the measured output voltage is 448V, that is, more than 10% higher than the specified value. See Figure 29.

Regarding the inner control loop, it is very important to consider that it is necessary to have a high enough bandwidth in order to follow the rectified sinusoidal reference. If the cross-frequency of the current loop is not high enough, a zero-crossing distortion in the input current will happen.

In these occasions, the results provided by SmartCtrl may not match the actual results, as the line current waveform is calculated by SmartCtrl assuming that the current loop follows perfectly well the reference generated by the outer loop.

Consequently, when a zero-crossing distortion is expected, the program displays a warning message to inform the user that the actual line current would differ from the one represented. The crossover frequency of the inner loop compensator should be increased to minimize this problem.

To illustrate this problem related with the low crossover frequency of the inner loop, a comparison between several designs of the inner loop with different phase margin (PM) and crossover frequency (fc). The input current waveforms achieved with these designs are compared in Figure 30.

Notice the important zero-crossing distortion for cross-over frequency lower than 5 kHz, and how the distortion is minimized as the cross-frequency is increased.

Export and simulate with PSIM

1. Click in SmartCtrl exporting to PSIM button

See Figure 31. Configure the exportation as shown in Figure 32.

2. In PSIM, the schematic of Figure 33 will appear. If the simulation is launched, the waveforms of Figure 34 will appear.

As it can be seen, the schematic of Figure 33 is exactly the objective of this tutorial. Figure 34 shows the output voltage and the rectified input current.

As it can be seen, the current has no distortion or ripple and the output voltage is exactly what was specified in SmartCtrl.