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Preprocessor output

User: "Gareth Williams"
Gareth Williams
Altair Community Member
Updated by Jocelyn

Is there a way to inspect preprocessing output, such as text macro expansion, in DSim?


IIRC, early versions of DSim shipped with a stand-alone SystemVerilog preprocessor, but there doesn't seem to be such a thing in recent releases.

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    User: "Shaun_Altair"
    Shaun_Altair
    Altair Employee

    Hi Gareth! Currently, we do not ship the preprocessor with releases of DSim. If enough people upvote your feature request, we may put it on our roadmap.

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