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Hi,
Greetings!
I have a query in execution sequence of state diagram in below image,
When I do step simulation, At T=0, the signal goes to State 2 and its get activated. Why the state 1 gets bypassed irrespective of the logic written over there?
At simulation start but before very first simulation step, state machine leaves initial pseudostate and moves to default state. State1 is the default state for this diagram. The initial transition cannot have triggers or guards, it can have behavior and it will be executed. For State1, the entry behavior is executed if presented.
If you check Log executed C instructions in State Chart Block Properties and launsh the chart, you'll see that Entry and Exit are in the log.