This document shows how to analyze USB (Universal Serial Bus) PCB layout design with PollEx SI (Signal Integrity) tool.
2. Background: USB Specification Revision 2.0
- USB Physical Interface
- The USB transfer signal (D+/D-) and power (VBus/GND) over a four-wire cable are shown in Figure 1. The signaling occurs over two wires on each point-to-point segment.
Figure 1. USB Cable
- USB data rates
- High-speed signaling bit rate: 480 Mbit/S <- applied for this SI analysis
- Full-speed signaling bit rate: 12 Mbit/S
- Low-speed signaling bit rate: 1.5 Mbit/S
- High-speed (480 Mb/s) Driver Characteristics
- Figure 2 defines four test planes; TP1 and TP4 are the test points for the transceiver, and TP2 and TP3 are the test points at the connectors.
Figure 2. Measurement Planes.
- When testing the hub circuit board at TP2 in Figure 2, measurements are made with the Transmitter/Receiver Test Fixture shown in Figure 3. The total terminating impedance of D+ is 45 ohm and that of D- is 45 ohm, too. (45 Ohm = 143//(15.8+50)).
Figure 3. Transmitter/Receive Test Fixture for TP2.
- Figure 4 and Table 1 show the transmit waveform requirement for a hub measured at TP2.
Figure 4. Transmit waveform requirements (Eye Mask) for a hub measured at TP2.
Table 1. Eye Mask Values for Figure 4.
3. SI Analysis: USB PCB Layout Design with PollEx
- PollEx PCB > File > Altair_PCB_USB_sample.pdbb (attached in the Project file)
- Save AS Project
- Check USB Layout (Pattern)
- Tool > PCB Explorer > Net > MCU_HOST_USB+/MCU_HOST_USB > Excl
Figure 5. USB D+/D- Layout Design (Exclusive View).
- Option > Net 2D/3D Viewer : Tx= U1(Part: NXP-4330) D24 & D25 Pins, Rx= CN2(Part: 675031020) 2 & 3 Pins
Figure 6. USB Layout Design (Net 2D View).
- Include “IBIS model” for IC-NXP4330 and “Linear model” for 675031020
- Properties > Parts > Double-click “IC-NXP4330” > Device Model Files > Add “NXP3330_USB.ibs” > Click “Display” to open IBIS Manager > USB20_HS
Figure 7. USB IBIS model for USB transmitter (NXP4330).
2. Properties > Parts > Double-click “675031020” > Device Model Files > Add “USB_Connector_linear.dmf” > Click “Display” to open Linear Device Modeler > USB_PD45
- Rin_g= 45 Ohm from Figure 3
(a) Model Spec
(b) Model Data
Figure 8. Linear model for USB receiver (connector).
- Execute “SI analysis: Net Topology Analyzer” for one USB differential pair design
- Analysis > Net Topology Analysis > Select Net for Analysis > Select “MCU_HOST_USB+” and “MCU_HOST_USB-” > Click “Analyze”
Figure 9. Net topology for USB differential pair layout
2. Analysis > Net Analysis in Net Topology Analyzer
- Active Driver Pin = U1_D25
- Pulse Period= 4.16 (nS) from the HS data rate = 480 Mbit/S (240 MHz= Pulse period 4.16 nS)”
- Device Models: Input = USB_PD45 & Output = USB20_HS
(a) Overall setting
(b) Device Model setting
Figure 10. Setting for Topology Network Analysis.
3. Check the final simulation results: Eye diagram
- Waveform: CN2_3 & CN2_2 > Vdiff
- Eye Mask setting with reference to Figure 4 and Table 1: Height (V) = 0.6 (=0.3+0.3), Top/Bottom= 25 (=(0.625-0.375)*100), Middle width(%)= 85 (=(0.925-0.075)*100), Reference voltage = Ground
Figure 11. Eye diagram (green) at USB connector with Eye mask (red).
- Universal Serial Bus - Specification Revision 2.0, April 27, 2000.