dc buck converter won't work. Help!
Altair EmployeeSubmitted by Joe on Sat, 10/31/2009 - 00:59
I'm using your dc-2buck-f2808-d diagram as a starting point to control my buck converter. I've taken the output voltage and wired it to ADCINB0 through a 1K resistor (I know it should be buffered but I want to do a quick test). I'm assuming that c0: is the reference? So if I set that to .5 my reference would be full scale input/2? 1.5V? But when I move the slider to a non zero value, the regulator goes from 0V to full on. What am I doing wrong?
Answers
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Submitted by pete on Sat, 10/31/2009 - 01:03.
It is hard to diagnose problems without having access to your system, but it sounds like there is a break in the feedback. In this case, as soon as you give some setpoint, the I term of the PID maxes out the control output.
Here are some more points that may help:
1) The dc-2buck diagram with output PWM1A takes input from ADC8, which is also known as ADCINB0.
2) Be careful with ADCIN voltages. The classic way to fry an F280x chip is to overvoltage the ADC. I'm not sure 1K is enough resistance to be safe given the high impedance of the ADC.
3) Yes, c0: is the setpoint command for output voltage as fraction of full scale ADC reading.
4) Internal Vref is 3V, so .5 ADC reading should == 1.5V5) The TI experimenter kit buck topology is very simple, only one channel of PWM is driven per converter (PWM1A in c0 of 2-buck diagram). If you need 2 legs driven, then you need to right click the ePWM1A/B block and change the action qualifier to provide output for EPWMB.
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Submitted by Joe on Sat, 10/31/2009 - 01:08.
I modified the PWM to give complementary output since my inverter needs both legs driven. I also had to change when the PWM sends the SOC (Start of Conversion) pulse to the ADC uni. It now works in open loop without a hitch. But when I close the loop it oscillates like crazy. Any tips on compensation?
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Submitted by pete on Sat, 10/31/2009 - 01:19.
1) Open the diagram under VisSim/DSP > Examples > Digital Power Systems > dc-8buck-tune-2804x Change the VisSim/DSP > F280x > DSP Config... to be 2808 (or whatever you are using for a target) and save as dc-buck-tune.vsm\ Also copy paste to replace the PWM1 block with the one you have configured for your inverter topology. Select Tools > Codegen > Compile...
2) Do the same thing with VisSim/DSP > Examples > Digital Power Systems > dc-8buck-tune-2804x-d Also, make sure that you have the proper JTAG linkage selected in the DSP Config... dialog. (save as dc-buck-tune-d) and also right click the DSP Interface block in the middle (it says 'dc-8buck-tune-f2804x.out' on it) and change the DSP Execution File to 'dc-buck-tune.out' so you run your compile from 1), and make sure sample rate is what you designed for (it is currently 200kHz) Click Go and move PID sliders to see response. You can change setpoint to see response at different voltages. Tune away.
This diagram will put out a 10ms setpoint cmd followed by a 90ms of zero value cmd to allow the voltage to resettle to zero. Digital scopes will give you the voltage response to full 0 - setpoint power up at the full sample rate (200 kHz in the original diagram).
You can also use our built in optimizer to automatically tune PID gains.
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Submitted by Joe on Sat, 10/31/2009 - 01:32.
I cranked down the 'I' term and it looks stable. Do you have any documentation on the PID? Transition response gives a damped output now but there is still a little overshoot.
I see my dsp utilization is 40% or so at a 400 kHz control sample rate. Does that sound right?
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Submitted by pete on Sat, 10/31/2009 - 01:40.
The PI in the buck example is from our Diagrams > Toolbox > Fixed point blocks. It works the same as the one in the PI/PID in the **VisSim/DSP > TI Digital Motor Control Blocks*. The key thing to know is that the I term incorporates the sample rate dT. So if you want an I term of 10, you multiply by the dt (0.0000025 at a sample rate of 400 kHz) and get .000025. So a 'small' I term of .01 is equivalent to a non-warped value of 4000. Note that the fixed-point blocks that the PID is built from are 16 bit, so you are limited in the lowest non-zero value you can represent (0.000030517578125) You can go to 32 bit precision if necessary but you will lose a little performance.
Yes, 40% utilization is about right for 400 kHz operation with debugging overhead.
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Submitted by Joe on Sat, 10/31/2009 - 01:44.
Can I use a bode plot to ensure phase margin and find the zero crossing?
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Submitted by pete on Sat, 10/31/2009 - 02:00.
The VisSim/Analyze addon lets you make Bode, Root Locus, or Nyquist plots from a selected portion of a VisSim diagram. It can create them from standard VisSim blocks (transfer functions, integrators etc), but not directly from a data set. You can create a transfer function from an input/output a step response data file. If you have a plot of such a response, right click the plot click save to file. Then use our system ID (we have 1st and 2nd order ID in the base VisSim package, and a Model Wizard addon for larger order) to fit a linear system response to the data. You can find some system ID diagrams under Diagrams > Examples > SystemID. Replace the data sets in the diagrams with responses from your plots. If you don't have an Analyze menu item, you can download the Analyze addon from here: VisSim Downloads
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