Digital Delay Sampling for Code Generation

Diverse ways to get time shifted samples in PSIM 


This article focuses on the usage of ZOH (zero order hold), ZOH (variable) blocks and ZOH oversampled model in PSIM. Furthermore, an equivalent model of ZOH (variable) block is discussed, specifically for code generation and hardware implementation 

First, let us see the ZOH block utilization and some important observations. Here, we take a simple circuit for analysis. Take a triangular wave source to generate a sawtooth wave of 10kHz frequency. Just add ZOH block with sampling frequency 10kHz. Another square wave source is taken to see the clock pulses.



If we run the simulation, the result at output is the value of source at the beginning of sampling i.e., zero as shown in the below figure. Since the samples are collected at the starting point of each cycle. 



Now let us see the utilization of ZOH (variable) block. Consider the same circuit, just add ZOH (variable) block as shown. There will be one extra port in this ZOH (variable) block. The bottom input is the sampling position. This position determines where in the duty cycle the sample is taken from. 



The result for this simulation shows that the ZOH (variable) output value is not zero as the samples are collected after a prescribed delay in sampling. In general, the output value depends on the sampling position and a value better representing the average will be the output depending on the waveform shape.  For example, in this case, since the selected position is 0.5, the output will be the mean value of the input signal. 



For applications specific to code generation, now we can discuss an equivalent circuit of this ZOH (variable) block which can used for hardware implementation. For this add an ADC and 1-ph PWM block in simulation as shown. Double click on 1-phase PWM block and keep ADC Trigger Position as per requirement. This will mimic the functionality of ZOH (variable) block’s extra port, where user can define the required delay. 



The result of this simulation is the same as the ZOH (variable) model simulation. Since ADC Trigger position value and ZOH (variable) input port value are same, samples collected after prescribed delay, the output is same. 



Finally, one can observe that all discussed models are giving output value based on the sample collecting position and input waveform shape. Further, the sampling frequency also did not change. Only the sampling position is changing. 

Another way to generate a more detailed output is by collecting more samples (i.e., over sampling or increasing sampling frequency) and averaging them. We will discuss this now. To get more samples, ZOH blocks with some unit delay blocks are connected as shown and the result is the averaged. Sampling frequency will be more than the source/clock frequency in this case due to oversampling. Here, in this case, we consider five times more than the source/clock frequency. 



The result of this circuit will appear as shown. Here in this case five samples are collected in every cycle and averaged them. The output will be true average value. Important observation is that the oversampling method is more robust which captures the true average value whereas the sample position method is dependent on the input waveform shape. 



The following shows the results of all different cases discussed above. Though oversampling is robust method there is a concern of increased computation requirements. It is a tradeoff between increased computation and robustness. Whereas in other cases as discussed above sampling position and shape of waveform matters a lot. 



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